1. Field of the Invention
The present invention generally relates to an on-chip test circuit for testing the gate oxide capacitance and more particularly to a circuit that includes a ring oscillator to allow high frequency testing.
2. Description of the Related Art
As integrated circuit transistors are reduced in size (e.g., scaled), gate dielectrics continue to get thinner. Gate dielectrics that have been scaled to very small values are experiencing an exponential increase in the incidence of undesirable tunneling currents, in which the gate dielectric fails to insulate the gate from the underlying substrate. In addition, the increased use of larger dielectric DC currents requires the use of higher frequency test devices when measuring capacitance in order for the displacement current to significantly exceed the DC leakage current.
For example, in 90 nm technology, the DC leakage has reached current densities on the order of 400 A/cm2, requiring frequencies on the order of 100 Mhz for the displacement current to significantly exceed the DC leakage current. Ordinary test structures and test equipment are unable to perform such high-frequency measurements, making the characterization of gate oxide thickness a very difficult test, which is unable to be repeated in a manufacturing environment.